1. Field of the Invention
This invention relates to semiconductor memory devices and more particularly to flash memory devices.
2. Description of Related Art
U.S. Pat. No. 5,414,287 of Hong for "Process for High Density Split-Gate Memory Cell for Flash or EPROM"; U.S. Pat. No. 5,494,838 of Chang for "Process of Making EEPROM Memory Device Having A Sidewall Spacer Floating Gate Electrode" and U.S. Pat. No. 5,364,806 of Ma for "Method of Making a Self-Aligned Dual-Bit Split Gate (DSG) Flash EEPROM Cell" show various methods/structures for split-gate Flash or EPROM cells.